2.1 SiC Process and Device Simulation
2.2 AlGaN Process and Device Simulation
2.3 How can I improve convergence in simulations of wide-bandgap-based devices?
2.4 My simulation runs slowly. How can I speed it up?
2.5 Relevant Application Notes
2.6 References
You can simulate both structure formation and electrical device behavior relevant to SiC technology. Different SiC polytypes are supported such as 3C–SiC, 4H–SiC, and 6H–SiC.
For more information about SiC process simulation, see Section 15. Special Focus: SiC Process Simulation.
To learn how to simulate SiC devices with Sentaurus Device, see Section 15. Special Focus: 4H-SiC PiN Device Breakdown Simulation.
For other examples, see Section 2.5 Relevant Application Notes.
TCAD Sentaurus provides relevant models to simulate the processing and electrical device behavior of AlGaN/GaN devices.
For more information about AlGaN process simulation, see Section 16. Special Focus: AlGaN Process Simulation.
To find out more about models and settings for AlGaN device simulation, see Section 16. Special Focus: Simulating AlGaN Devices With Sentaurus Device.
For other examples, see Section 2.5 Relevant Application Notes.
Simulations involving wide-bandgap materials are more prone to convergence problems due to the numeric challenges in performing floating-point operations with extremely large and extremely small numbers such as the concentrations of majority and minority carriers in wide-bandgap semiconductors.
If you experience convergence problems:
Often, removing some numeric idealities can improve convergence, as follows:
Electrode { ... { Name="drain" Voltage= 0.0 Resistor= 1e10 } } Math { Transient= BE } Solve { ... Transient ( InitialStep= 1e-4 Increment= 1.4 [InitialTime=... FinalTime=...] Goal { Name="drain" Voltage=5000 } ) { Coupled {Poisson Electron Hole} } }
Physics { ... Optics(OpticalGeneration(SetConstant(Value=1e6))) }
Physics { ... hBarrierTunneling "NLM" } Math { ... Nonlocal "NLM" (Barrier(Region="Al2O3_Ins")) }
Sentaurus Device provides the keywords CNormPrint and NewtonPlot, which constitute powerful tools to understand and resolve convergence issues.
CNormPrint prints, after each Newton iteration, one line for each equation being solved, with the name of the equation, the maximum update error, its corresponding coordinate, and the value of the solution variable at that location. Inspection of the output or log files typically indicates which equation is responsible for convergence problems and the location where errors are largest.
NewtonPlot plots TDR files with maps of errors and residuals for each equation, which is essentially the same information as CNormPrint, but in a more comprehensive and graphical way.
In both cases, the information is most useful after the Newton iteration that brought the solution closest to convergence, with often only one equation still struggling. In addition, you are typically interested in Newton plots only when the simulation is on the verge of failing to converge, that is, when the bias step is close to its minimum allowed by the MinStep keyword.
The following Math section excerpt demonstrates how to switch on these convergence-monitoring tools in such a way that Newton plots are created only for small bias steps and for the iteration that was closest to convergence:
Math { ... CNormPrint NewtonPlot (Error MinError Residual) }
The generated NewtonPlot TDR files in this example are named n@node@_np_<iteration number>_min_des.tdr. The choice of file name is specified in the File section:
File { ... NewtonPlot= "n@node@_np_%d_%d_des.tdr" }
The first C-format specifier (%d) is replaced by the bias step number and the second C-format specifier is replaced by min since you chose to plot only a file for the Newton iteration that is closest to convergence.
See Section 6. Nonlinear System Newton Solver for further help on how to improve convergence.
Devices based on wide-bandgap materials are usually used in power applications and are often large. As a consequence, mesh sizes also tend to be large and simulations take longer than simulations of devices for other applications.
The default linear solver SUPER is the most accurate and leads to the most robust simulations. Therefore, SUPER is typically the linear solver of choice when simulating wide-bandgap-based devices. However, significant progress has been made with the iterative solver ILS, which is significantly faster than SUPER. In addition, while SUPER can be used only for single-thread (single CPU core) simulations, ILS can be parallelized and can take advantage of modern multicore machines.
The ILS solver with default numeric parameters leads to simulations that are typically not robust enough. However, by tightening up some of its numeric parameters, you can run robust simulations of SiC- and GaN-based devices significantly faster than with the SUPER solver.
Typical Math sections are listed in Section 15.4 SiC-Specific Numeric Parameters and Section 16.6 AlGaN-Specific Numeric Parameters. However, depending on the specific application, other more relaxed settings might work faster.
To benefit from the multicore capability of the ILS solver, the number of parallel threads is set with NumberOfThreads:
Math { ... NumberOfThreads=4 * Simulation uses 4 threads (requires parallel license) ... }
See Section 9.4 Linear Solvers for details about ILS numeric parameters.
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